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| PACKAGED 2W POWER PHEMT * FEATURES 33 dBm Output Power at 1-dB Compression at 15 GHz 8 dB Power Gain at 15 GHz 60% Power-Added Efficiency LP3000P100 * DESCRIPTION AND APPLICATIONS The LP3000P100 is a packaged Aluminum Gallium Arsenide / Indium Gallium Arsenide (AlGaAs/InGaAs) pseudomorphic High Electron Mobility Transistor (pHEMT). It utilizes a 0.25 m x 3000 m Schottky barrier gate, defined by electron-beam photolithography. The recessed "mushroom" gate structure minimizes parasitic gate-source and gate resistance. The epitaxial structure and processing have been optimized for reliable high-power applications. The LP3000 also features Si3N4 passivation and is available in die form or in other packages. The LP3000P100 is designed for medium-power, linear amplification. This device is suitable for applications in commercial and military environments, and it is appropriate to be used as a medium power transistor in SATCOM uplink transmitters, medium-haul digital radio transmitters, PCS high efficiency amplifiers, and WLL systems. * ELECTRICAL SPECIFICATIONS @ TAmbient = 25C Parameter Saturated Drain-Source Current Power at 1-dB Compression Power Gain at 1-dB Compression Power-Added Efficiency Maximum Drain-Source Current Transconductance Gate-Source Leakage Current Pinch-Off Voltage Gate-Source Breakdown Voltage Magnitude Gate-Drain Breakdown Voltage Magnitude frequency=15 GHz Symbol IDSS P-1dB G-1dB PAE IMAX GM IGSO VP |VBDGS| |VBDGD| Test Conditions VDS = 2 V; VGS = 0 V VDS = 8 V; IDS = 50% IDSS VDS = 8 V; IDS = 50% IDSS VDS = 8 V; IDS = 50% IDSS; PIN = 17 dBm VDS = 2 V; VGS = 1 V VDS = 2 V; VGS = 0 V VGS = -5 V VDS = 2 V; IDS = 5 mA IGS = 8 mA IGD = 8 mA -0.25 -12 -12 700 Min 800 31.5 7 Typ 975 33 8 45 1700 900 15 -1.2 -15 -16 130 -2.0 Max 1100 Units mA dBm dB % mA mS A V V V Phone: (408) 988-1845 Fax: (408) 970-9950 http:// www.filss.com Revised: 1/20/01 Email: sales@filss.com PACKAGED 2W POWER PHEMT * ABSOLUTE MAXIMUM RATINGS Parameter Drain-Source Voltage Gate-Source Voltage Drain-Source Current Gate Current RF Input Power Channel Operating Temperature Storage Temperature Total Power Dissipation Notes: * * Symbol VDS VGS IDS IG PIN TCH TSTG PTOT Test Conditions TAmbient = 22 3 C TAmbient = 22 3 C TAmbient = 22 3 C TAmbient = 22 3 C TAmbient = 22 3 C TAmbient = 22 3 C -- TAmbient = 22 3 C -65 Min Max 12 -4 2xIDSS 30 700 175 175 3.0 Units V V mA mA mW C C W LP3000P100 * * Operating conditions that exceed the Absolute Maximum Ratings could result in permanent damage to the device. Power Dissipation defined as: PTOT (PDC + PIN) - POUT, where PDC: DC Bias Power PIN: RF Input Power POUT: RF Output Power Absolute Maximum Power Dissipation to be de-rated as follows above 25C: PTOT= 3.0W - (0.020W/C) x THS where THS = heatsink or ambient temperature. This PHEMT is susceptible to damage from Electrostatic Discharge. Proper precautions should be used when handling these devices. * HANDLING PRECAUTIONS To avoid damage to the devices care should be exercised during handling. Proper Electrostatic Discharge (ESD) precautions should be observed at all stages of storage, handling, assembly, and testing. These devices should be treated as Class 1A (0-500 V). Further information on ESD control measures can be found in MIL-STD-1686 and MIL-HDBK-263. APPLICATIONS NOTES & DESIGN DATA Applications Notes are available from your local Filtronic Sales Representative or directly from the factory. Complete design data, including S-parameters, noise data, and large-signal models are available on the Filtronic web site. * Phone: (408) 988-1845 Fax: (408) 970-9950 http:// www.filss.com Revised: 1/20/01 Email: sales@filss.com PACKAGED 2W POWER PHEMT * PACKAGE OUTLINE (dimensions in mils) LP3000P100 All information and specifications are subject to change without notice. Phone: (408) 988-1845 Fax: (408) 970-9950 http:// www.filss.com Revised: 1/20/01 Email: sales@filss.com |
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